As demand for electronic device miniaturization and increased power continues, there is a corresponding need dissipate heat during the component's operation by reducing the components size, thickness, in order to improve its user-friendly nature to consumers. Thinned substrates reduce weight, dissipate heat, and aid in device electrical operation. In semiconductors, where connections between stacked chips are shortened and made with through silicon vias (TSVs), the result increases impedance in the device performance. In flat panel displays, thin substrates reduce weight and increase flexibility to aid in a wide range of ergonomic shapes and sizes.
While the benefits of thinned substrates are recognized, it is generally understood that handling delicate substrates is technologically challenging. As testimony of this fact, there exist no less than five (5) commercial temporary adhesive technologies for handling thin substrates, all of which require robotic process tools and downgrades in throughput. The commercialized technologies are similar, in that they all use spin coating to apply the adhesive, they all achieve a minimum thermal resistance of 200° C., and their demount and cleans require processing with a single substrate handling tool (i.e. robot aided demount operation). With one exception where the use is an amorphous rubber, all of the adhesives are cross-linked, as in the case of silicone, polyimide, and acrylic. Demounting cross-linked materials requires destroying the bond at the interface. These practices vary between variable applied forces in different ergonomic directions with and without thermal assistance, or the use of laser assisted ablative methods to destroy the adhesive interface. These methods are complex, impose undue stresses on the work unit, and result in adhesive residue that is difficult or impossible to remove without permanent damage to the wafer. Costs of single wafer handling tools are expensive and exhibit low throughput with yield losses from the inability to control the aforementioned materials conditions and irregularities in the process.
Display operations are fast catching-up to semiconductor wafer's demand for thin substrates. Glass substrates produce undue hardship on manufacturing, packaging, shipping, and from the consumer's standpoint, becomes a challenge to handle such an item as it is burdened by weight and cost. New designs for displays include thin glass substrates for thin film transistor (TFT) and flexible organic substrates for organic light emitting diode (OLED) devices. Engineers at the fabs are struggling with new ways of processing thin work units of varying shapes, sizes, and thicknesses. Tooling is standardized and costly to change. Next generation ideas surround approaches of temporarily mounting work units onto glass carrier substrates of standard thickness and size to facilitate manufacturing without a high investment into new tooling. With the advent of new environmental regulations in Europe, pressure from the consumer on the use of green manufacturing practices is moving upstream to the fabs in Asia.
From the foregoing described regimen, a need exists for an adhesive that is simple to use and green. Green systems eliminate toxic solvents and waste. A detergent soluble system may provide flexible alternatives to fab engineers to use their existing tooling and designs without costly changes. An adhesive is needed in semiconductor manufacturing to achieve a planarized coating over topography, mounts to rigid substrates, is resistant to the thermal and chemical rigors of the of the manufacturing process, and can be removed and cleaned using chemistries that are EHS friendly. Further, display processes need temporary adhesives to affix irregular shaped, sized, and thick work units onto carrier substrates. It is especially important for display operations to proceed simply and without the burdens of cost. This invention provides an adhesive system that is soluble in detergent and when used at selected process parameters and conditions, affords a mechanism that provides substantial benefit for manufacturing.
Primary purposes for the use of thin substrates in manufacturing microelectronic devices, includes their enhanced cooling of the device during operation, enabling of substrate stacking, for example, as in three dimensional (3-D) packaging, and to reduce the mass of the final product. Conventional methods to achieve thinning are driven to smaller thicknesses but are limited by the fragile nature of the device substrate. When pursuing very thin objectives, a support structure is used (i.e. carriers), whereby a tool handles the support structure and thinning of the microelectronic substrate is achieved without damage.
Examples of final products in microelectronics where there exists a desire to thin substrates includes integrated circuits (IC), microelectromechanical systems (MEMS), and large irregular panel dimensions as in flat panel displays (FPD) and solar substrates. Manufacturing ICs and MEMS are typically conducted upon wafers of standard diameters that are composed of silicon or compound semiconductor species and are taken to ultra-thin values and subsequently stacked to achieve designs in 3-D packaging. Where FPDs and solar panels are concerned, thinned substrates of various shapes are required to reduce weight to meet ergonomic objectives of the final customer package. Conventional technologies for achieving thin device substrates include mechanical grinding and chemical etching, and where ultra-thin dimensions are in demand, various protecting and handling materials are used as tapes, coatings, and externally mounted rigid supports (i.e. carriers). Both semiconductor and display fabs use carrier supports handling work units at <100 microns (<100 μm), sustaining added processes, including resist pattering, plasma etching, post-etch residue cleans, and metallization.
Not only does wafer thinning help to dissipate heat, but it also aids in the electrical operation of the IC. Substrate thickness affects impedance and capacitance performance of certain connecting leads, e.g. transmission lines, of given thickness from the top of the IC to the bottom where contact is made to the PWB. Thick substrates cause an increase in capacitance, requiring thicker transmission lines, and in turn, a larger IC footprint. Substrate thinning increases impedance while capacitance decreases, causing a reduction in transmission line thickness, and in turn, a reduction in IC size. In other words, substrate thinning facilitates IC both performance and miniaturization.
An additional incentive in support of substrate thinning involves geometrical reasons. Via-holes are etched into the backside of an IC device wafer to facilitate front side contacts. In order to construct a via-hole (hereafter sometimes referred to as a “Via” or “Vias”) using common dry-etch techniques, minimum geometrical design standards apply. Namely, for IC substrates of the gallium arsenide (GaAs) type with thicknesses of <100 um, a 30-70 um diameter via may be constructed using dry-etch methods that produce minimal post-etch residue within an acceptable time. In silicon substrates of thicknesses of <25 um, vias of much smaller diameter of <10 um, sometimes referred to as through silicon vias (TSVs), are used for communication between stacked chips in 3-D packaging. Due to the complexity of silicon ICs, many TSVs are required for connectivity. As substrates are thinned further to smaller dimensions, smaller diameter vias may be used, requiring shorter etch times, producing smaller amounts of post-etch residue, and promoting greater throughput. Smaller vias require less metallization and in turn, lower cost. Therefore, from the standpoint of backside processing, thin substrates can always be processed quicker and at lower cost.
A final consideration in support of thin substrates is that they are more easily cut and scribed into devices. Thinner substrates have a smaller amount of material to penetrate and cut, and therefore require less effort. Whether the method used is sawing, scribe and break, or laser ablation, microelectronic devices are easier to cut from thinner substrates.
In the case where a microelectronic device is manufactured on a wafer, the substrates are thinned after wafer front side operations are complete. In this case, the devices are fabricated onto wafers that exist at their normal full-size thickness, e.g. 600-700 um (0.024-0.028″). Once completed, they are thinned to 100-150 um (0.004-0.006″). In some cases, as in hybrid substrates used for high power devices, e.g. Gallium Arsenide (GaAs), thickness may be taken down to 25 um (0.001″).
Substrate thinning may be performed by mechanical or chemical means. In a mechanical thinning process, the substrate surface to be thinned is brought into contact with a hard and flat rotating horizontal platter that contains a liquid slurry. The slurry may contain abrasive media with chemical etchants such as ammonia, fluoride, or the combinations thereof. The abrasive operates as a “gross” substrate removal means, i.e. thinning, while the etchant chemistry facilitates “polishing” at the submicron level.
Thinning may also be performed by chemical etching. Unlike mechanical processing, substrates enter a tank containing a chemical etchant. Substrates are thinned by the action of a vigorous chemical reaction with the substrate composition. For example, silicon may be etched at rapid rates using a mixture of nitric acid with levels of fluoride present, or by the use of a strong alkali such as potassium hydroxide. Chemical etch rates are typically more difficult to control due to their high rates of removal, which may approach 100 um per minute. Where bath control is needed to achieve greater uniformity, a diluted chemistry with temperature controls is common practice.
In both cases of mechanical and chemical thinning, the substrate is maintained in contact with the media until an amount of material has been removed to achieve a targeted thickness. While it is of interest to achieve substrate thinning, it is simultaneously an objective to protect the device areas during such processing. Temporary mounted carriers may include sapphire, quartz, certain glasses, and silicon. They and usually exhibit a thickness of 1000 um (1 mm or 0.040″). Substrate choice will depend on how closely matched the coefficient of thermal expansion (CLTE) is between each material. Although it is common to use transparent carriers such as sapphire, quartz, and glass, some cost sensitive processes may use silicon with an alternative practice to the use of visible light microscopy for locating alignment markers or conducting inspection. Where necessary, carrier substrates may be produced with holes, channels (e.g. grooves), or other similar designs. These specially designed carriers offer an enhanced transport of chemical fluids to the surface of the substrate in order to accelerate demount.
All external carriers require the use of an adhesive for mounting onto the device substrate. The adhesive becomes incorporated into the substrate-carrier package (substrate package), whereby its properties must exhibit thermal resistance to be accepted into the steps of thinning and backside processing. The adhesive must maintain a rigid network such that no mechanical compromise occurs (e.g. movement) and any reference points established during mounting will be preserved. The maximum temperature exhibited in wafer backside processing occurs during resist baking, via etching, and deposition of certain metals or oxides. In U.S. Pat. No. 7,098,152 (2006), Moore, a process of using an external temporary carrier is described with an adhesive coating that withstands processing temperatures up to and including 130 degrees centigrade.
Another desire of the adhesive is to exhibit good chemical resistance. This must be established for a range of chemistries from strong etchants used in post-thinning stress relief such as sulfuric, ammonia, and/or peroxide, as well as organic solvents used in the lithography and clean steps during via-hole processing. Ideally, the adhesive must be resistant to these process chemistries, yet be selectively dissolved and removed at the end of the manufacturing process line. At times, certain aggressive chemistries may be chosen which have detrimental effects on the adhesive. As such, some temporary manufacturing measures may be taken to include protective tape or other coverings.
Mounting adhesives used to apply external temporary carriers to silicon and compound semiconductor wafers are disclosed in U.S. Pat. No. 6,869,894 (2005), Moore, and in Mould, D., and Moore, J., A New Alternative for Temporary Wafer Mounting, GaAs ManTech Conf. and Proc., pp. 109-112, (2002). The compositions and practices identified in these references provide the necessary conditions as an adhesive coating that is thermally resistant up to and including 130 degrees centigrade. In U.S. Pat. No. 7,232,770 (2007), Moore et al., and the publication by Moore, J., Smith, A., and Kulkarni, S., High Temperature Resistant Adhesive for Wafer Thinning and Backside Processing, GaAs ManTech Conf. and Proc., pp. 175-182, (2004), describes a similar process of using an external temporary carrier with a high temperature resistant adhesive which may be processed at temperatures exceeding 200 degrees centigrade. At the time of this application, other adhesive compositions have been disclosed in U.S. Patent Application No. 2007/0185310 A1 (2007), Moore et al., where thermal and chemical resistant coatings are taught for adhering external temporary carriers that withstand processing temperatures that exceed 200 degrees centigrade and are resistant to polar solvents commonly used in semiconductor fabrication areas, such as n-methyl pyrollidone (NMP).
The polymer compositions as described in U.S. Pat. No. 6,869,894 (2005), Moore, U.S. Pat. No. 7,232,770 (2007), Moore et al., and U.S. Patent Application No. 2007/0185310 A1 (2007), Moore et al., involve the following chemistries: a thermoplastic rosin-urethane, a thermoset silicone, and a thermoplastic rubber, respectively. With the exception of U.S. Pat. No. 7,232,770 (2007), Moore et al., both U.S. Pat. No. 6,869,894 (2005), Moore and U.S. Patent Application No. 2007/0185310 A1 (2007), Moore et al., involve the casting of polymers from a chemical mixture and curing by evaporation. All of the above noted disclosures require the use of organic solvents during demounting of the external temporary carrier by dissolving and removing the adhesive polymer.
According to the disclosures in the U.S. Pat. Nos. 6,869,894, 7,232,770, and U.S. Patent Application No. 2007/0185310, they all describe different adhesive chemistries. These items are used for traditional methods of attaching an external carrier support made of glass, sapphire, or silicon. The attachment process requires a special tool to coat the substrate, cure, align the substrate and carrier, and mount by using heat or another similar activation step. When demounting, the process is usually reversed, however, an organic chemical is used to penetrate the adhesive, swell the polymer, and facilitate full dissolution such that complete carrier demount from the substrate is achieved.
Mounting and demounting of the external carrier can be a lengthy and a delicate process. During mounting, the device substrate is coated with an adhesive and cured to a level sufficient to secure both surfaces. Attention must be given to the adhesive's ability to planarize the device surface, such that the topography is fully encapsulated and protected during the carrier mounting when excessive pressures may be applied. A special tool is used to bring the surfaces of the adhesive coated device wafer and carrier support into contact with each other. Depending upon the adhesive, the mounting process will utilize heat, light exposure, and pressure to achieve cure and facilitate a securely mounted substrate and carrier. Demount is the reverse process, involving the separation of the external carrier from the device substrate by a means of chemical, mechanical, or processes that involve the combination thereof.
Chemical demounting requires the use of perforated support substrates, specially fabricated to increase the rate of chemical penetration leading to dissolution and removal of the mounting adhesive. In this process, the chemistry of choice is an organic solvent that is heated and allowed to diffuse into the holes (perforations) or channels (grooves), as well as the bond line between the external carrier and device substrate. Organic solvents are generally used to demount the external carrier and remove residual polymer adhesive on the device substrate surface. These chemicals are needed in excessive quantities (e.g. 20-40 gallons) in a cleaning process, whereby the substrates travel from one heated bath to another in an effort to demount the external carrier and remove the adhesive to deminimus levels on the device substrate and result in a clean surface. The entire demount process is lengthy, commonly measured in hours.
Alternatively, thermo mechanical demounting may be achieved with thermoplastic adhesives. As taught in U.S. Pat. No. 6,792,991 B2, Thallner, and U.S. Patent Application No. 2007/0155129 (2007), Thallner, separation may be achieved by heating the mounted external carrier and device substrate to a temperature above the melting point of the thermoplastic adhesive while simultaneously applying a shear force in a manner designed to separate the mounted surfaces. In other words, the device substrate is removed from the external support carrier by heat and a mechanical force of a predetermined amount and in an orientation sufficient to demount the two surfaces. Cleaning with a selected organic solvent typically follows to ensure residual adhesive is cleaned from the substrate.
When mechanical separation is conducted, substrate removal is typically faster than diffusion-limited chemical demount processes. However, specially designed tools must be used to remove a thinned device substrate from the external carrier without damage to the topography. These tools drive up the overall costs of the process. Although mechanical removal may proceed faster than chemical, a true comparison should consider total substrate throughput. In this case, a chemical process is typically done by a batch process where two or more cassettes of twenty-five (25) wafers are accommodated in a bath as compared to a mechanical tool that operates as a single wafer handling operation. Further, there is an increased risk in substrate damage when using a mechanical device that moves or pulls the microelectronic substrate against the surface of the external support carrier. Where there may be an interest to consider mechanical equipment, such adoption would be difficult to meet the requirements and cost constraints of handling irregular and large substrates such as microelectronic panels.
Another application for substrate thinning, which also requires the use of external carrier supports, is described in the U.S. Patent Applications 2009/0017248 A1 (2009), Larson et al., 2009/0017323 A1 (2009), Webb et al., and in the International Application WO 2008/008931 A1 (2008), Webb et al. These applications describe the use of a layered body that is formed which comprises the substrate being attached to a rigid support (carrier), described here as an external carrier support. The adhesive described is a bilayer system composed of a photothermal conversion layer and a curable acrylate. A preliminary review of the bilayer system appears to emphasize its chemical complexity, however, it follows with claims of improvements during the demount part of the process. The applications cite the use of a laser irradiation device which allows rapid demount of the external support carrier and is followed by a mechanical peeling practice of the curable acrylate from the thinned substrate. Although these improvements may be recognized for demounting the external carrier, concerns exist about the throughput of this design for high-volume substrate manufacturer and its cost effective application to large panels.
When discussing display manufacturing or any panel-making endeavor, there is a more serious need for readily demountable processes. The substrates are much larger than semiconductor wafers and as such, the bonding and debonding mechanisms require more time, or in some cases, are unsuccessful. Throughputs for displays are typically required to be higher than semiconductor wafers, due to the fact that each wafer represents hundreds or thousands of devices, where one panel may represent very few component displays. Several demount mechanisms exist, however they surround either laser ablative or plasma texturing of the substrate surface with a specific adhesive. In U.S. Pat. Nos. 7,045,438B2, 7,147,740B2, 7,180,093B2, 7,332,381B2, 7,351,300B2, 6,946,361B2, Takayama, et. al, discuss bonding layers which are deposited onto the substrate by vacuum deposition with internal stresses present, whereby the corresponding layers have contradictory compressive and tensile stress and debonding is triggered by laser interaction. In U.S. Pat. No. 6,036,809, Kelly, et. al, U.S. Pat. No. 7,867,876B2, and U.S. Pat. No. 7,932,614B2, Codding, et. al, and U.S. Patent Application No. 2009/0218560, Flaim, et. al, there is mention of the use of laser ablation for debonding thin and delicate substrates as used in the semiconductor market.
Laser ablative tooling is non-trivial, in that it requires exacting focus of an optical device of a specific wavelength and to do this onto an interface between the work unit and the carrier substrate. The laser's focus does this while it or the substrate is being shifted in continual motion moving rapidly across the substrate. As well known to those familiar with the art of coatings and planarization efforts, there will be irregularities in materials applied over the surface of the work unit. The adhesives used for these practices vary between rubber, silicone, polyimide, acrylic, and the like. The laser transmits through an optically clear carrier substrate and focuses onto the interfacial region where the adhesive meets the carrier, causing a significant and immediate rise in temperature, or burning of the material to destroy the adhesion. There is a micro area of impact that absorbs this temperature rise and fall for that second. The laser continues to move to the next location in an apparent smooth fashion until the entire surface of the substrate has been exposed and thereupon the release of the work unit is expected. The impacts of this process is realized later with irregularities commonly observed such as micro-cracks, fissures, and residue that is burnt onto surfaces which cannot be removed. Laser ablative processes, although a common practice for debonding delicate substrates, remains a subject of much discussion when considered for high volume manufacturing.
The practices mentioned here to support delicate devices for microelectronic processes as well as many others that are faced daily, present serious and compelling challenges. Further, there is a continuing need for improved “green” processing of device substrates in microelectronic manufacturing. A green process and their associated chemistries reduce or eliminate hazardous substances. According to the American Chemical Society's Green Chemistry Institute, there are twelve (12) principles, which help to define a green chemistry. Replacing the organic solvents to demount a device substrate and remove residual adhesive fits with this plan. Where processes require the use of chemicals to conduct cleaning, a desire exists to use aqueous-based systems and to rinse with DI water.
There is a challenge to design a process that is supported by a tool that will enable rapid processing of parts, and complete adhesive removal with an aqueous material without deleterious effects to the substrate. An adhesive that breaks down, dissolves, and allows the release of the work unit without single wafer handling equipment is a significant benefit to throughput and ease of manufacturing. This invention describes a detergent soluble adhesive that uses simple and cost effective process equipment generally accepted for aqueous processing. There is a continuing emphasis for the microelectronics industry to be green through improving the safety of operations, reducing the use of chemistry, and reducing the generation of hazardous waste. Taking these challenges together, there is a pressing need to provide a consistent and universal process, which uses an adhesive composition with a temporary rigid carrier, provides high performance, high throughput, a green process, and all at a reduced cost of ownership.